Product Summary

The UPD70F3044YGC-8EU-E3-DE is a MOS integrated circuit. The applications of the UPD70F3044YGC-8EU-E3-DE include System/servo/camera control of camcorders, Portable cameras such as digital still cameras, Cellular phones, portable information terminals, etc.

Parametrics

UPD70F3044YGC-8EU-E3-DE absolute maximum ratings: (1)Supply voltage: -0.5V to +4.6V; (2)Input voltage: –0.5 to VDD + 0.5V; (3)Clock input voltage: –0.5 to VDD + 1.0V; (4)Analog input voltage: –0.5 to AVDD + 0.5V; (5)Analog reference input voltage: –0.5 to AVDD + 0.5V; (6)Output current, low: 4.0mA; (7)Output current, high: -4.0mA; (8)Output voltage: –0.5 to VDD + 0.5 V; (9)Operating ambient temperature TA: –40℃ to +85℃; (10)Storage temperature Tstg: –65℃ to +150℃.

Features

UPD70F3044YGC-8EU-E3-DE features: (1)Number of instructions: 74; (2)Minimum instruction execution time: 62.5ns (@ 16 MHz operation with main system clock), 30.5 ms (@ 32.768 kHz operation with subsystem clock); (3)General-purpose registers: 32 bits×32 registers; (4)Instruction set (signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions, load/store instructions); (5)Memory space: 16MB linear address space; (6)Memory block allocation function: 2MB per block; (7)External bus: 16-bit multiplexed bus; (8)I/O lines Total: 151; (9)10-bit resolution A/D converter: 16 channels; (10)Timer/counter: 24-bit: 2 channels, 16-bit: 2 channels, 8-bit: 8 channels; (11)Watch timer: 1 channel; (12)Watchdog timer: 1 channel; (13)DMA controller: 6 channels; (14)Interrupts and exceptions; (15)RTP: 8 bits×2 channels or 4 bits×4 channels; (16)PWM output: 4 channels; (17)Vsync/Hsync separation circuit; (18)On-chip key return function; (19)On-chip clock generator; (20)Power saving function: HALT/IDLE/STOP modes; (21)ROM correction: 4 points changeable; (22)Package: 176-pin plastic LQFP (24×24 mm).

Diagrams

UPD70F3044YGC-8EU-E3-DE block diagram

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