(Hong Kong)
Product Summary
The SN74HC165DBR is a shift register. The SN74HC165DBR clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Since a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH should be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs.
Parametrics
SN74HC165DBR absolute maximum ratings: (1)Supply voltage range: -0.5 V to 7 V; (2)Input clamp current: ±20 mA; (3)Output clamp current: ±20 mA; (4)Continuous output current: ±25 mA; (5)Continuous current through VCC or GND: ±50 mA; (6)Package thermal impedance: 73℃/W(D package), 82℃/W(DB package), 67℃/W(N package), 64℃/W(NS package), 108℃/W(PW package); (7)Storage temperature range: -65℃to 150℃.
Features
SN74HC165DBR features: (1)Wide Operating Voltage Range of 2 V to 6 V; (2)Outputs Can Drive Up To 10 LSTTL Loads; (3)Low Power Consumption, 80-μA Max ICC; (4)Typical tpd = 13 ns; (5)±4-mA Output Drive at 5 V; (6)Low Input Current of 1 μA Max; (7)Complementary Outputs; (8)Direct Overriding Load (Data) Inputs; (9)Gated Clock Inputs; (10)Parallel-to-Serial Data Conversion.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
 |
 SN74HC165DBR |
Texas Instruments |
Counter Shift Registers 8-Bit Parallel-Load Shift Register |
Data Sheet |
|
|
||||||||||||
|
SN74HC165DBRE4 |
Texas Instruments |
Counter Shift Registers 8-Bit Parallel-Load Shift Register |
Data Sheet |
|
|
||||||||||||
|
SN74HC165DBRG4 |
Texas Instruments |
Counter Shift Registers 8B Parallel Load Shift Registers |
Data Sheet |
|
|
||||||||||||
