74HC4051D

74HC4051D, high-speed Si-gate CMOS device, SOIC14, 11V, ±20mA, 500mW, NXP Semiconductors

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PartNumber:: 74HC4051D

Brand:: NXP Semiconductors - nxp | Pack: SOIC | D/C: 12+

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Products Upload time: 2012-10-29

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Product Summary

The 74HC4051D is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC4051D is specified in compliance with JEDEC standard no. 7A. The 74HC4051D is an 8-channel analog multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.

Parametrics

74HC4051D absolute maximum ratings: (1)VCC, supply voltage: -0.5 to +11.0 V; (2)IIK, input clamping current, VI < -0.5 V or VI > VCC + 0.5 V: ±20mA max; (3)ISK, switch clamping current VSW < -0.5 V or VSW > VCC + 0.5 V: ±20mA max; (4)ISW, switch current -0.5 V < VSW < VCC + 0.5 V: ±25mA max; (5)IEE, supply current: ±20mA max; (6)ICC, supply current: 50mA max; (7)IGND, ground current: -50mA max; (8)Tstg, storage temperature: -65 to +150 ℃; (9)Ptot, total power dissipation: DIP16 package: 750mW max; SO16, (T) SSOP16, and DHVQFN16 package: 500mW max; (10) P, power dissipation per switch: 100mW max.

Features

74HC4051D features: (1)Wide analog input voltage range from -5 V to +5 V; (2)Low ON resistance: 80 Ω (typical) at VCC - VEE = 4.5 V; 70 Ω (typical) at VCC - VEE = 6.0 V; 60 Ω (typical) at VCC - VEE = 9.0 V; (3)Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals; (4)Typical break before make built-in; (5)ESD protection: HBM JESD22-A114F exceeds 2000 V; MM JESD22-A115-A exceeds 200 V; (6)Multiple package options; (7)Specified from -40℃ to +85℃ and -40℃ to +125℃.