Product Summary

The CD74HCT75E is a Dual 2-Bit Bistable Transparent Latch. Each one of the 2-bit latches is controlled by separate Enable inputs (1E and 2E) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E and 2E) is LOW the output is not affected.

Parametrics

CD74HCT75E absolute maximum ratings: (1)DC Supply Voltage, VCC: -0.5V to 7V; (2)DC Input Diode Current, IIK For VI＜-0.5V or VI＞VCC + 0.5V :±20mA; (3)DC Output Diode Current, IOK For VO＜-0.5V or VO＞VCC + 0.5V:±20mA; (4)DC Output Source or Sink Current per Output Pin, IO For VO＞-0.5V or VO＜VCC + 0.5V: ±25mA; (5)DC VCC or Ground Current, ICC or IGND : ±50mA.

Features

CD74HCT75E features: (1)True and Complementary Outputs; (2)Buffered Inputs and Outputs; (3)Fanout (Over Temperature Range) Standard Outputs: 10 LSTTL Loads; (4)Bus Driver Outputs: 15 LSTTL Loads; (5)Wide Operating Temperature Range: -55℃ to 125℃; (6)Balanced Propagation Delay and Transition Times; (7)Significant Power Reduction Compared to LSTTL Logic ICs; (8)HC Types: 2V to 6V Operation; (9)High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V; (10)HCT Types: 4.5V to 5.5V Operation; (11)Direct LSTTL Input Logic Compatibility,; (12)VIL= 0.8V (Max), VIH = 2V (Min): CMOS Input Compatibility, Il 1≤μA at VOL, VOH.

Diagrams

CD74HCT75E block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)		 Quantity
CD74HCT75E
CD74HCT75E
Texas Instruments
Latches High Speed CMOS Dual
Data Sheet
0-1: $0.50
1-25: $0.41
25-100: $0.37
100-250: $0.32
CD74HCT75EE4
CD74HCT75EE4
Texas Instruments
Latches High Speed CMOS Dual
Data Sheet
0-1: $0.50
1-25: $0.41
25-100: $0.37
100-250: $0.32