Product Summary
The 74HC273D is a high-speed Si-gate CMOS. It is pin compatible with low power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC standard no. 7A.
Parametrics
74HC273D AC characteristics: (1)propagation delay CP to Qn:16ns to 30ns; (2)propagation delay MR to Qn:23ns to 34ns; (3)output transition time: 7ns to 15ns; (4)clock pulse width HIGH or LOW:9ns to 16ns; (5)master reset pulse width LOW:8ns to 16ns; (6)removal time MR to CP:-2ns to 10ns; (7)set-up time Dn to CP:5ns to 12ns; (8)hold time Dn to CP:-4ns to 3ns; (9)maximum clock pulse frequency:30MHz to 56MHz.
Features
74HC273D features: (1) Ideal buffer for MOS microprocessor or memory; (2) Common clock and master reset; (3) Eight positive edge-triggered D-type flip-flops; (4) See “377” for clock enable version; (5) See “373” for transparent latch version; (6)See “374” for 3-state version; (7)Output capability; standard; (8)ICC category: MSI.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||
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74HC273D,652 |
NXP Semiconductors |
Flip Flops OCTAL D F/F W/RESET |
Data Sheet |
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74HC273D,653 |
NXP Semiconductors |
Flip Flops OCTAL D-TYPE F/F |
Data Sheet |
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74HC273DB,118 |
NXP Semiconductors |
Flip Flops OCTAL D-TYPE |
Data Sheet |
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74HC273DB,112 |
NXP Semiconductors |
Flip Flops OCTAL D-TYPE |
Data Sheet |
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74HC273DB |
NXP Semiconductors |
Flip Flops OCTAL D-TYPE |
Data Sheet |
Negotiable |
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74HC273DB-T |
NXP Semiconductors |
Flip Flops OCTAL D-TYPE |
Data Sheet |
Negotiable |
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