Product Summary

The 74AC109SC is a Dual JK Positive Edge-Triggered Flip-Flop. It consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to 74AC109SC data sheet) by connecting the J and K inputs together.

Parametrics

74AC109SC absolute maximum ratings: (1)Supply Voltage (VCC): -0.5V to +7.0V; (2)DC Input Diode Current (IIK) VI = -0.5V: -20mA; (3)VI = VCC + 0.5V: +20mA; (4)DC Input Voltage (VI): -0.5V to VCC + 0.5V; (5)DC Output Diode Current (IOK) VO = -0.5V: -20mA; (6)VO = VCC + 0.5V: +20mA; (7)DC Output Voltage (VO): -0.5V to VCC + 0.5V; (8)DC Output Source or Sink Current (IO): ±50mA; (9)DC VCC or Ground Current per Output Pin (ICC or IGND): ±50mA; (10)Storage Temperature (TSTG): -65℃ to +150℃; (11)Junction Temperature (TJ) PDIP: 140℃.

Features

74AC109SC features: (1) ICC reduced by 50%; (2) Outputs source/sink 24mA; (3) ACT109 has TTL-compatible inputs.

Diagrams

74AC109SC block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
74AC109SC
74AC109SC

Fairchild Semiconductor

Flip Flops Dual J-K Flip-Flop

Data Sheet

Negotiable 
74AC109SC_Q
74AC109SC_Q

Fairchild Semiconductor

Flip Flops Dual J-K Flip-Flop

Data Sheet

Negotiable 
74AC109SCX
74AC109SCX

Fairchild Semiconductor

Flip Flops Dual J-K Flip-Flop

Data Sheet

Negotiable